| MRC |
Requirement Statement |
Characteristics |
| AFJQ |
STORAGE TEMP RANGE |
-65.0 TO 200.0 DEG CELSIUS |
| AEHX |
MAXIMUM POWER DISSIPATION RATING |
40.0 MILLIWATTS |
| ADAT |
BODY WIDTH |
0.265 INCHES MAXIMUM |
| CQWX |
OUTPUT LOGIC FORM |
TRANSISTOR-TRANSISTOR LOGIC |
| CSSL |
DESIGN FUNCTION AND QUANTITY |
1 FLIP-FLOP, J-K, OR INPUT |
| TTQY |
TERMINAL TYPE AND QUANTITY |
14 FLAT LEADS |
| CBBL |
FEATURES PROVIDED |
HERMETICALLY SEALED AND INTERNALLY COMPENSATED AND NEGATIVE EDGE TRIGGERED AND ASYNCHRONOUS AND W/CLOCK AND HIGH SPEED |
| CQSZ |
INCLOSURE CONFIGURATION |
FLAT PACK |
| AFGA |
OPERATING TEMP RANGE |
0.0 TO 75.0 DEG CELSIUS |
| CWSG |
TERMINAL SURFACE TREATMENT |
SOLDER |
| CQSJ |
INCLOSURE MATERIAL |
CERAMIC |
| ADAQ |
BODY LENGTH |
0.265 INCHES MAXIMUM |
| CZEN |
VOLTAGE RATING AND TYPE PER CHARACTERISTIC |
5.5 VOLTS MAXIMUM POWER SOURCE |
| CQZP |
INPUT CIRCUIT PATTERN |
10 INPUT |
| ADAU |
BODY HEIGHT |
0.030 INCHES MINIMUM AND 0.080 INCHES MAXIMUM |
| CZEQ |
TIME RATING PER CHACTERISTIC |
20.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 40.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
| TEST |
TEST DATA DOCUMENT |
05869-717320-13 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
