| MRC |
Requirement Statement |
Characteristics |
| CZEN |
VOLTAGE RATING AND TYPE PER CHARACTERISTIC |
8.0 VOLTS MAXIMUM POWER SOURCE |
| CQWX |
OUTPUT LOGIC FORM |
TRANSISTOR-TRANSISTOR LOGIC |
| CBBL |
FEATURES PROVIDED |
HERMETICALLY SEALED AND MONOLITHIC AND W/ENABLE AND W/CLEAR AND EDGE TRIGGERED AND ASYNCHRONOUS AND SYNCHRONOUS AND POSITIVE OUTPUTS |
| TTQY |
TERMINAL TYPE AND QUANTITY |
14 FLAT LEADS |
| CQSZ |
INCLOSURE CONFIGURATION |
FLAT PACK |
| PRMT |
III PRECIOUS MATERIAL |
GOLD |
| ADAU |
BODY HEIGHT |
0.065 INCHES MAXIMUM |
| SR-5 |
THE MANUFACTURERS DATA |
|
| PMLC |
III PRECIOUS MATERIAL AND LOCATION |
TERMINAL SURFACE GOLD |
| ADAT |
BODY WIDTH |
0.145 INCHES MINIMUM AND 0.260 INCHES MAXIMUM |
| AEHX |
MAXIMUM POWER DISSIPATION RATING |
695.0 MILLIWATTS |
| AFGA |
OPERATING TEMP RANGE |
-55.0 TO 125.0 DEG CELSIUS |
| CQSJ |
INCLOSURE MATERIAL |
CERAMIC AND GLASS |
| AFJQ |
STORAGE TEMP RANGE |
-65.0 TO 150.0 DEG CELSIUS |
| ADAQ |
BODY LENGTH |
0.240 INCHES MINIMUM AND 0.275 INCHES MAXIMUM |
| CQZP |
INPUT CIRCUIT PATTERN |
9 INPUT |
| CSSL |
DESIGN FUNCTION AND QUANTITY |
1 FLIP-FLOP, J-K, CLOCKED AND 1 FLIP-FLOP, J-K, MASTER SLAVE |
| SR-5 |
MANUFACTURERS CODE |
13973 |
| CZEQ |
TIME RATING PER CHACTERISTIC |
80.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 80.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
| CWSG |
TERMINAL SURFACE TREATMENT |
GOLD OR SOLDER |
| SR-5 |
DESIGN CONTROL REFERENCE |
862272-0024 |
