| MRC |
Requirement Statement |
Characteristics |
| ADAU |
BODY HEIGHT |
0.008 INCHES MINIMUM AND 0.100 INCHES MAXIMUM |
| CQWX |
OUTPUT LOGIC FORM |
TRANSISTOR-TRANSISTOR LOGIC |
| TEST |
TEST DATA DOCUMENT |
35351-154868 DRAWING (THIS IS THE BASIC GOVERNING DRAWING, SUCH AS A CONTRACTOR DRAWING, ORIGINAL EQUIPMENT MANUFACTURER DRAWING, ETC.; EXCLUDES ANY SPECIFICATION, STANDARD OR OTHER DOCUMENT THAT MAY BE REFERENCED IN A BASIC GOVERNING DRAWING) |
| AGAV |
III END ITEM IDENTIFICATION |
NAVIGATIONAL SET,LORAN,TYPE AN/ARN-101 |
| AEHX |
MAXIMUM POWER DISSIPATION RATING |
240.0 MILLIWATTS |
| CQSZ |
INCLOSURE CONFIGURATION |
FLAT PACK |
| ADAT |
BODY WIDTH |
0.200 INCHES MINIMUM AND 0.300 INCHES MAXIMUM |
| PRMT |
III PRECIOUS MATERIAL |
GOLD |
| TTQY |
TERMINAL TYPE AND QUANTITY |
16 FLAT LEADS |
| CWSG |
TERMINAL SURFACE TREATMENT |
SOLDER |
| CTFT |
CASE OUTLINE SOURCE AND DESIGNATOR |
M0-004-AH JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| PMLC |
III PRECIOUS MATERIAL AND LOCATION |
TERMINALS GOLD |
| CBBL |
FEATURES PROVIDED |
HERMETICALLY SEALED AND MONOLITHIC AND POSITIVE OUTPUTS AND W/ENABLE AND HIGH SPEED AND W/CLEAR AND EDGE TRIGGERED AND ASYNCHRONOUS AND SYNCHRONOUS AND DARLINGTON-CONNECTED AND W/STORAGE |
| AFGA |
OPERATING TEMP RANGE |
-55.0 TO 125.0 DEG CELSIUS |
| CSSL |
DESIGN FUNCTION AND QUANTITY |
2 FLIP-FLOP, J-K, CLOCKED AND 2 FLIP-FLOP, J-K, MASTER SLAVE |
| CQSJ |
INCLOSURE MATERIAL |
CERAMIC AND GLASS |
| AFJQ |
STORAGE TEMP RANGE |
-65.0 TO 150.0 DEG CELSIUS |
| CZEN |
VOLTAGE RATING AND TYPE PER CHARACTERISTIC |
5.5 VOLTS MAXIMUM POWER SOURCE |
| CZEQ |
TIME RATING PER CHACTERISTIC |
40.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, LOW TO HIGH LEVEL OUTPUT AND 55.00 NANOSECONDS MAXIMUM PROPAGATION DELAY TIME, HIGH TO LOW LEVEL OUTPUT |
| CQZP |
INPUT CIRCUIT PATTERN |
10 INPUT |
| ADAQ |
BODY LENGTH |
0.450 INCHES MAXIMUM |
